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-- Company: 
-- Engineer:
--
-- Create Date:   20:04:28 09/16/2014
-- Design Name:   
-- Module Name:   C:/Users/Student/Desktop/Workspace/hamming/corrector_test.vhd
-- Project Name:  hamming
-- Target Device:  
-- Tool versions:  
-- Description:   
-- 
-- VHDL Test Bench Created by ISE for module: corrector
-- 
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
-- Notes: 
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for the ports of the unit under test.  Xilinx recommends
-- that these types always be used for the top-level I/O of a design in order
-- to guarantee that the testbench will bind correctly to the post-implementation 
-- simulation model.
--------------------------------------------------------------------------------
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
 
-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--USE ieee.numeric_std.ALL;
 
ENTITY corrector_test IS
END corrector_test;
 
ARCHITECTURE behavior OF corrector_test IS 
 
    -- Component Declaration for the Unit Under Test (UUT)
 
    COMPONENT corrector
    PORT(
         B : IN  std_logic_vector(7 downto 1);
         C : IN  std_logic_vector(3 downto 1);
         O : OUT  std_logic_vector(4 downto 1)
        );
    END COMPONENT;
    

   --Inputs
   signal B : std_logic_vector(7 downto 1) := (others => '0');
   signal C : std_logic_vector(3 downto 1) := (others => '0');

 	--Outputs
   signal O : std_logic_vector(4 downto 1);
 
BEGIN
 
	-- Instantiate the Unit Under Test (UUT)
   uut: corrector PORT MAP (
          B => B,
          C => C,
          O => O
        );

   -- Stimulus process
   stim_proc: process
   begin		
      -- hold reset state for 100 ns.
      wait for 10 ns;	

		B <= "0000111";
		C <= "000";
		
		wait for 10 ns;
		
		B <= "0000011";
		C <= "011";
		
		wait for 10 ns;
		
		B <= "0010111";
		C <= "101";
		
		wait for 10 ns;
		
		B <= "0000110";
		C <= "001";

      -- insert stimulus here 

      wait;
   end process;

END;