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Release 14.6 Trace  (nt64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.

C:\Xilinx\14.6\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 4
-n 3 -fastpaths -xml claadder.twx claadder.ncd -o claadder.twr claadder.pcf
-ucf claadder.ucf

Design file:              claadder.ncd
Physical constraint file: claadder.pcf
Device,package,speed:     xc3s500e,fg320,-4 (PRODUCTION 1.27 2013-06-08)
Report level:             verbose report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
--------------------------------------------------------------------------------

INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:3412 - To improve timing, see the Timing Closure User Guide (UG612).
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths 
   option. All paths that are not constrained will be reported in the 
   unconstrained paths section(s) of the report.
INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on 
   a 50 Ohm transmission line loading model.  For the details of this model, 
   and for more information on accounting for different loading conditions, 
   please see the device datasheet.
INFO:Timing:3390 - This architecture does not support a default System Jitter 
   value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock 
   Uncertainty calculation.
INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and 
   'Phase Error' calculations, these terms will be zero in the Clock 
   Uncertainty calculation.  Please make appropriate modification to 
   SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase 
   Error.



Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Pad to Pad
---------------+---------------+---------+
Source Pad     |Destination Pad|  Delay  |
---------------+---------------+---------+
A<0>           |S<0>           |    7.662|
A<0>           |S<1>           |   10.166|
A<0>           |S<2>           |   10.405|
A<0>           |S<3>           |   11.028|
A<0>           |co             |    9.978|
A<1>           |S<1>           |    9.234|
A<1>           |S<2>           |   10.127|
A<1>           |S<3>           |   10.750|
A<1>           |co             |    9.700|
A<2>           |S<2>           |    9.182|
A<2>           |S<3>           |    9.608|
A<2>           |co             |    8.558|
A<3>           |S<3>           |    8.720|
A<3>           |co             |    7.721|
B<0>           |S<0>           |    7.128|
B<0>           |S<1>           |    9.852|
B<0>           |S<2>           |   10.091|
B<0>           |S<3>           |   10.714|
B<0>           |co             |    9.664|
B<1>           |S<1>           |    8.676|
B<1>           |S<2>           |    9.525|
B<1>           |S<3>           |   10.148|
B<1>           |co             |    9.098|
B<2>           |S<2>           |    8.867|
B<2>           |S<3>           |    9.200|
B<2>           |co             |    8.150|
B<3>           |S<3>           |    8.433|
B<3>           |co             |    7.246|
cin            |S<1>           |   11.888|
cin            |S<2>           |   12.127|
cin            |S<3>           |   12.750|
cin            |co             |   11.700|
---------------+---------------+---------+


Analysis completed Tue Sep 30 20:59:48 2014 
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Trace Settings:
-------------------------
Trace Settings 

Peak Memory Usage: 162 MB