rx_tx Project Status (12/02/2014 - 20:34:04)
Project File: RS-232.xise Parser Errors: No Errors
Module Name: rx Implementation State: Programming File Not Generated
Target Device: xc3s500e-4fg320
  • Errors:
  
Product Version:ISE 14.6
  • Warnings:
  
Design Goal: Balanced
  • Routing Results:
  
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
  
Environment:  
  • Final Timing Score:
   
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateTue Dec 2 20:25:11 2014
WebTalk ReportCurrentTue Dec 2 20:33:57 2014
WebTalk Log FileCurrentTue Dec 2 20:34:04 2014

Date Generated: 12/02/2014 - 20:34:04